1/8 november 2000 STB60NF03L n-channel 30v - 0.008 w - 60a d2pak stripfet? power mosfet (1) starting t j =25 c, i d =30a, v dd =20v n typical r ds (on) = 0.008 w n low threshold drive description this power mosfet is the latest development of stmicroelectronics unique single feature size ? strip-based process. the resulting tran- sistor shows extremely high packing density for low on-resistance, rugged avalance characteris- tics and less critical alignment steps therefore a re- markable manufacturing reproducibility. applications n high current, high speed switching n motor control,audio amplifiers n dc-dc & dc-ac converters n automotive environment (injection, abs, air-bag, lampdrivers, etc.) absolute maximum ratings ( l ) pulse width limited by safe operating area type v dss r ds(on) i d STB60NF03L 30 v < 0.01 w 60 a symbol parameter value unit v ds drain-source voltage (v gs = 0) 30 v v dgr drain-gate voltage (r gs = 20 k w ) 30 v v gs gate- source voltage 20 v i d drain current (continuos) at t c = 25c 60 a i d drain current (continuos) at t c = 100c 42 a i dm ( l ) drain current (pulsed) 240 a p tot total dissipation at t c = 25c 100 w derating factor 0.67 w/c e as (1) single pulse avalanche energy 650 mj t stg storage temperature C65 to 175 c t j max. operating junction temperature 175 c d 2 pak 1 3 internal schematic diagram
STB60NF03L 2/8 thermal data electrical characteristics (tcase = 25 c unless otherwise specified) off on (1) dynamic rthj-case thermal resistance junction-case max 1.5 c/w rthj-amb thermal resistance junction-ambient max 62.5 c/w rthj-sink thermal resistance case-sink max 0.5 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 30 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating 1a v ds = max rating, t c = 125 c 10 a i gss gate-body leakage current (v ds = 0) v gs = 20 v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs , i d = 250a 1 1.5 2.5 v r ds(on) static drain-source on resistance v gs = 10 v, i d = 30 a 0.008 0.010 w v gs = 4.5 v, i d = 30 a 0.0095 0.015 w i d(on) on state drain current v ds > i d(on) x r ds(on)max, v gs =10v 60 a symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds > i d(on) x r ds(on)max, i d = 30 a 60 s c iss input capacitance v ds = 25v, f = 1 mhz, v gs = 0 2550 pf c oss output capacitance 630 pf c rss reverse transfer capacitance 215 pf
3/8 STB60NF03L electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 15 v, i d = 30 a r g = 4.7 w v gs = 4.5 v (see test circuit, figure 3) 40 ns t r rise time 250 ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 24 v, i d = 60a, v gs = 5v 43 12 21 58 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off-delay time fall time v dd = 15 v, i d = 30 a, r g =4.7 w, v gs = 4.5v (see test circuit, figure 3) 60 70 ns ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 60 a i sdm (1) source-drain current (pulsed) 240 a v sd (2) forward on voltage i sd = 60 a, v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 60 a, di/dt = 100a/s, v dd = 15 v, t j = 150c (see test circuit, figure 5) 75 100 2.6 ns nc a safe operating area thermal impedence
STB60NF03L 4/8 output characteristics gate charge vs gate-source voltage transconductance static drain-source on resistance transfer characteristics capacitance variations
5/8 STB60NF03L normalized gate threshold voltage vs temperature source-drain diode forward characteristics normalized on resistance vs temperature
STB60NF03L 6/8 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
7/8 STB60NF03L 1 dim. mm. inch min. typ max. min. typ. max. a 4.4 4.6 0.173 0.181 a1 2.49 2.69 0.098 0.106 a2 0.03 0.23 0.001 0.009 b 0.7 0.93 0.027 0.036 b2 1.14 1.7 0.044 0.067 c 0.45 0.6 0.017 0.023 c2 1.23 1.36 0.048 0.053 d 8.95 9.35 0.352 0.368 d1 8 0.315 e 10 10.4 0.393 e1 8.5 0.334 g 4.88 5.28 0.192 0.208 l 15 15.85 0.590 0.625 l2 1.27 1.4 0.050 0.055 l3 1.4 1.75 0.055 0.068 m 2.4 3.2 0.094 0.126 r 0.4 0.015 v2 0 o8o d 2 pak mechanical data 3
STB60NF03L 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsib ility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectroni cs. specifi cation mentio ned in this publication are subject to change without notice. this publication supersedes and replaces all in formation previou sly supplied. stmicroel ectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is a trademark of stmicroelectronics ? 2000 stmicroelectronics C pr inted in italy C all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malay sia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com
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